Topics / Loop unrolling and instruction-level parallelism
Performance topic
Loop unrolling and instruction-level parallelism
Break dependency chains so the CPU can run independent instructions in parallel: unrolling, multiple accumulators and interleaved streams.
705proven techniques
15pitfalls: tried, then slower
389repositories
17from papers
Languages
- C++213
- C184
- Rust57
- CUDA37
- Go12
- Python11
Hardware
- x86269
- ARM136
- CPU131
- NVIDIA GPU54
- GPU24
Fields
- math167
- data & compression161
- general127
- CPU91
- GPU75
Where these come from
Repositories with the most techniques on this topic in the database:
torvalds/linux · 12openssl/openssl · 11weidai11/cryptopp · 9golang/go · 9gmp-mirror/gmp · 8facebook/zstd · 7OpenMathLib/OpenBLAS · 7wolfSSL/wolfssl · 7Cyan4973/xxHash · 7Legrandin/pycryptodome · 7
Ask Claude for the full answer
Each technique comes with its bottleneck, measured speedup, trade-offs, conditions and the commit or paper behind it, served to Claude through MCP.
claude mcp add --transport http adtomic https://www.adtomic.co/mcp
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